1. Field of the Invention
This invention relates generally to supports for wafers in semiconductor processing chambers and, more particularly, to a wafer holder for supporting a wafer within a cold wall chemical vapor deposition chamber.
2. Description of the Related Art
High-temperature ovens, or reactors, are used to process semiconductor wafers from which integrated circuits are made for the electronics industry. A substrate, typically a circular silicon wafer, is placed on a wafer holder. If the wafer holder helps to attract heat, it is called a susceptor. The wafer and wafer holder are enclosed in a quartz chamber and heated to high temperatures, such as 600° C. (1112° F.) or higher, by a plurality of radiant lamps placed around the quartz chamber. A reactant gas is passed over the heated wafer, causing the chemical vapor deposition (CVD) of a thin layer of the reactant material on the wafer. Through subsequent processes in other equipment, these layers are made into integrated circuits, with a single layer producing from tens to thousands of integrated circuits, depending on the size of the wafer and the complexity of the circuits.
If the deposited layer has the same crystallographic structure as the underlying silicon wafer, it is called an epitaxial layer. This is also sometimes called a monocrystalline layer because it has only one crystal structure.
Various CVD process parameters must be carefully controlled to ensure the high quality of the deposited films and the resulting semiconductor. One such critical parameter is the temperature of the wafer during the processing. The deposition gas reacts at particular temperatures and deposits on the wafer. If the temperature varies greatly across the surface of the wafer, uneven deposition of the reactant gas occurs. Similarly, temperature uniformity can be important for a variety of other semiconductor fabrication processes, such as etching, annealing, doping, etc.
Rotatable wafer holders are known in the art. Rotation of the wafer holder results in more uniform temperature distribution and deposition across the wafer.
In recent years, single-wafer processing of larger diameter wafers has grown for a variety of reasons including its greater precision as opposed to processing batches of wafers at the same time. Although single-wafer processing by itself provides advantages over batch processing, control of process parameters and throughput remains critical. In systems in which the wafer is supported in intimate contact with a large-mass, slab-like susceptor, the necessity of maintaining uniform susceptor temperature during heat-up and cool-down cycles limits the rate at which the temperature could be changed. For example, in order to maintain temperature uniformity across the susceptor, the power input to the edges of the susceptor had to be significantly greater than the power input to the center due to the edge effects.
As explained above, CVD processing often occurs at temperatures of 600° C. (1112° F.) or higher. One common problem associated with CVD processing is that, when a cold wafer is loaded onto the top surface of a susceptor inside a pre-heated reaction chamber, the wafer tends to experience “thermal shock” due to thermal gradients within the wafer from sudden conductive heat transfer from the hot susceptor to the cold wafer. These thermal stresses can result in wafer “curl” and “pop,” as well as damage to the backside of the wafer. The largest problem associated with such thermal gradients is wafer pop, which causes the wafer to move randomly on the susceptor surface. This movement causes temperature non-uniformities, which reduces the repeatability of process characteristics such as thickness uniformity.
One method to reduce the problems associated with thermal shock is to substantially decrease wafer load temperatures. This is not common because it adversely affects throughput, since the temperature must be decreased before each new wafer is loaded and then increased before processing of the wafer can begin. Decreases in throughput results in decreased production and greater manufacturing costs. Thus, in order to maintain a desired throughput, some degree of wafer curl and pop are usually tolerated.
Some susceptors are equipped with vertically oriented lift pins that are vertically moveable through holes in the surface of the susceptor upon which the wafer rests. When the lift pins are elevated, the wafer is separated from the susceptor surface so as to slow heat transfer from the susceptor to the wafer. This permits the wafer to preheat, thus reducing thermal gradients when the wafer is lowered into contact with the susceptor. When the lift pins are lowered, the wafer is brought into flush contact with or very close to the susceptor surface, permitting conductive heat transfer therebetween.
Presently, there is a need for an improved wafer support system, which permits higher wafer load temperatures while avoiding the problems associated with thermal shock.